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Veuillez utiliser cette adresse pour citer ce document : http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/10223

Titre: Analysis of the gate-to-channel capacitance variation for the tri-gate nanowire junctionless transistors
Auteur(s): Smaani, Billel
Yakhelef, Yassine
Nafa, Fares
Salah, Mouhamed
Mots-clés: Tri-gate junctionless nanowire
Gate-to-channel capacitance
Threshold voltage
Date de publication: 2021
Collection/Numéro: Conference: GLOBAL CONFERENCE on ENGINEERING RESEARCH Project: Analyse of micro and nanostructures Silicium;
Résumé: In this paper, the gate-to-channel capacitance variation for the tFlat-band voltageri-gate nanowire junctionless transistor (JLT) has been analyzed. It is based on the 2-D electrostatic numerical simulation realized using Silvaco-TCAD Software. The flat-band voltage and the threshold voltage are extracted trough the plotting of the derivative for the gate-to-channel capacitance versus the gate voltage. This plotting is performed for different values of the channel width and the channel height of the tri-gate JLT. Moreover, the physical effect of the back-gate biasing has been investigated
URI/URL: http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/10223
Collection(s) :Communications Nationales

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