Hardware-In-the loop simulation of Inverter’s control unite based on OPAL-RT and FPGA

Abstract

Due to the increasing cost of power electronics switches and the cost of repairing failures of power electronics systems, semi-physical simulation technology such as hardware-in-the-loop (HIL) simulation is increasingly being used as an important design, development, and testing step in the manufacturing process of many power electronics systems. In this project, HIL simulation for an FPGA-based controller of a three-level power inverter was performed and tested using the OPAL-RT HIL simulation tool. First, an FPGA-based controller for a single-phase three-level inverter was designed and tested. Three different PWM digital control circuits (Bipolar SPWM, Unipolar SPWM, and SHEPWM) were designed from scratch using VHDL. Then Hardware-in-The-loop testing of the controller was implemented using the RT-LAB HIL testing platform. To emulate the three-level inverter, a simulation model based on MATLAB ® /Simulink software and Simscap blocks was designed to perform real-time simulation testing of the FPGA-based controller. The obtained test results were compared to pre-simulated results using MATLAB ® , the results have shown that the total harmonic distortion (THD) of the difference controlling circuits decreases gradually and thus helps improve the power quality of the inverter, the final HIL results were acceptable and close to the expected and real results especially with the SHEPWM where we obtained errors less than 7% between expected and HIL results.