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| Titre: | A Multihit Time-to-Digital Converter Architecture on FPGA |
| Auteur(s): | Amiri, Amir Mohammad
Boukadoum, Mounir
Khouas, Abdelhakim |
| Mots-clés: | Field-programmable gate array (FPGA),
ime measurement circuit
time-to-digital converter (TDC)
Vernier delay line (VDL) |
| Date de publication: | 2009 |
| Editeur: | IEEE |
| Collection/Numéro: | Transactions on Instrumentation and Measurement 58(3);PP. 530 - 540 |
| Résumé: | We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation. The fine interpolator is a matrix of Vernier delay cells interconnected in a topology to provide two propagation paths for the incoming data pulse. Two methods of calibration are presented to estimate the component delays. The TDC circuit achieves time measurements with a resolution of 75 ps with an average precision of ~ 300 ps and is capable of detecting incoming pulses at a distance of 7.5 ns or more from each other |
| URI/URL: | http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/3012 |
| ISSN: | 0018-9456 |
| Collection(s) : | Publications Internationales
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