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| Titre: | Low Dead Time, Multi-hit FPGA-Based Time-to-Digital Converter |
| Auteur(s): | Amiri, Amir Mohammad
Boukadoum, Mounir
Khouas, Abdelhakim |
| Mots-clés: | Low Dead Time,
Multi-hit FPGA
Digital Converter |
| Date de publication: | 2006 |
| Editeur: | IEEE |
| Collection/Numéro: | Conference: Circuits and Systems;PP. 29-32 |
| Résumé: | This paper presents improvements on a novel FPGAbased
multi-hit Time-to-Digital Converter (TDC) to measure time
intervals with a resolution of 100ps and a variable dynamic range
controlled by a binary coarse counter. We use a matrix topology
to provide a two-level resolution, aiming to minimize the overall
measurement time. The conventional dead time is eliminated by
the continuous detection and processing of data by two delay
matrices operating in parallel. A back-resetting scheme eliminates
the erroneous multi-detection of an event along matrix tap lines.
The circuit was tested on a XILINX SPARTAN-3 FPGA platform. |
| URI/URL: | http://dlibrary.univ-boumerdes.dz:8080/handle/123456789/3025 |
| ISSN: | 1-4244-0417-7 |
| Collection(s) : | Communications Internationales
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